SRAM 256k x 4 - Revision history

WikiSysop at 11:12, 18 December 2017

2017-12-18T11:12:08Z

← Older revision		Revision as of 11:12, 18 December 2017
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	!MARKINGS		!MARKINGS
	\|-		\|-
	\|Pyramid Semiconductor \|\| P4C \|\| 1026 \|\| SOJ28 LCC32 \|\| TS \|\| P4C1026 P4C1026L		\|Pyramid Semiconductor \|\| P4C \|\| 1026 \|\| DIP28-400mil SOJ28-300mil SOJ28-400mil LCC32 \|\| TS \|\| P4C1026 P4C1026L
	\|}		\|}

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	[[Category:RAM]]		[[Category:RAM]]
			[[Category:DIP28-400mil]]
	[[Category:SOJ28-300mil]]		[[Category:SOJ28-300mil]]
	[[Category:SOJ28-400mil]]		[[Category:SOJ28-400mil]]
	[[Category:LCC32-450x550mil]]		[[Category:LCC32-450x550mil]]

WikiSysop: /* Files */

2017-12-18T11:08:11Z

Files

← Older revision		Revision as of 11:08, 18 December 2017
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	[[Category:RAM]]		[[Category:RAM]]
	[[Category:~~DIP28~~-300mil]]		[[Category:SOJ28-300mil]]
	[[Category:~~DIP28~~-400mil]]		[[Category:SOJ28-400mil]]
	[[Category:LCC32-450x550mil]]		[[Category:LCC32-450x550mil]]

WikiSysop: /* Files */

2017-12-18T11:07:43Z

Files

← Older revision		Revision as of 11:07, 18 December 2017
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	[[Category:RAM]]		[[Category:RAM]]
	[[Category:~~SOJ28~~]]		[[Category:DIP28-300mil]]
			[[Category:DIP28-400mil]]
	[[Category:LCC32-450x550mil]]		[[Category:LCC32-450x550mil]]

WikiSysop at 13:58, 19 March 2017

2017-03-19T13:58:44Z

← Older revision		Revision as of 13:58, 19 March 2017
Line 68:		Line 68:
	[[Category:RAM]]		[[Category:RAM]]
	[[Category:SOJ28]]		[[Category:SOJ28]]
	[[Category:LCC32]]		[[Category:LCC32-450x550mil]]

WikiSysop: /* Files */

2017-02-01T20:49:08Z

Files

← Older revision		Revision as of 20:49, 1 February 2017
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	=Files=		=Files=
	<gallery widths="150px">		<gallery widths="150px">
	File:~~P4C1026~~.pdf\|p4c1026 Datasheet		File:p4c1026.pdf\|p4c1026 Datasheet
	</gallery>		</gallery>

WikiSysop at 20:48, 1 February 2017

2017-02-01T20:48:18Z

← Older revision		Revision as of 20:48, 1 February 2017
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	l{\| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable"		{\| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable"
	\|+ style="background:silver" \| Cross-Reference		\|+ style="background:silver" \| Cross-Reference
	!BRAND		!BRAND
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	\|-		\|-
	\|Pyramid Semiconductor \|\| P4C \|\| 1026 \|\| SOJ28 LCC32 \|\| TS \|\| P4C1026 P4C1026L		\|Pyramid Semiconductor \|\| P4C \|\| 1026 \|\| SOJ28 LCC32 \|\| TS \|\| P4C1026 P4C1026L
	\|-
	~~\|Samsung \|\| KM \|\| 41464 \|\| \|\| \|\| KM64257A KM64257AL KM64257B KM64258B KM64259B KM64260B~~
	\|}		\|}

WikiSysop at 20:46, 1 February 2017

2017-02-01T20:46:25Z

← Older revision		Revision as of 20:46, 1 February 2017
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	~~SRAM 256K x~~ 4 ~~(DIP32, 600mil)~~		l{\| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable"
			\|+ style="background:silver" \| Cross-Reference
			!BRAND
			!TAG
			!NUMBER
			!PIN COUNT
			!OUTPUT
			!MARKINGS
			\|-
			\|Pyramid Semiconductor \|\| P4C \|\| 1026 \|\| SOJ28 LCC32 \|\| TS \|\| P4C1026 P4C1026L
			\|-
			\|Samsung \|\| KM \|\| 41464 \|\| \|\| \|\| KM64257A KM64257AL KM64257B KM64258B KM64259B KM64260B
			\|}

	~~1Mb, 128KB, 40000hex4 bit~~		'''Static Random-Access Memory 256K x 4'''

	~~pinout~~		=Size=
			{\| border="1" cellpadding="4" cellspacing="0"
			\|-align="left"
			!bit
			!Byte (padded 0000xxxx)
			!Byte (unpadded)
			!Hex
			\|-
			\|1Mb \|\| 256KB \|\| 128KB \|\| 100000hex
			\|}

			=Pinout=
	<pre>		<pre>
	+--\/--+		SOJ28
	~~N.C.~~\|1 32\| Vcc		+---\/---+
	~~A16~~ \|2 31\| ~~A15~~		A0 \| 1 28\| Vcc
	~~A17~~ \|3 30\| A3		A1 \| 2 27\| A17
	A0 \|4 29\| A4		A2 \| 3 26\| A16
	A1 \|5 28\| A5		A3 \| 4 25\| A15
	A2 \|6 27\| A6		A4 \| 5 24\| A14
	A10 \|~~7 26~~\| A7		A5 \| 6 23\| A13
	A11 \|8 25\| A8		A6 \| 7 22\| A12
	A12 \|9 24\| ~~N.C.~~		A7 \| 8 21\| A11
	A13 \|10 23\| I0		A8 \| 9 20\| NC
	A14 \|11 22\| I1		A9 \|10 19\| I/O3
	A9 \|12 21\| 00		A10 \|11 18\| I/O2
	I3 \|13 20\| O1		*CE \|12 17\| I/O1
	I2 \|14 19\| O2		*OE \|13 16\| I/O0
	CE/ \|15 18\| O3		GND \|14 15\| *WE
	~~GND~~ \|16 17\| ~~WE/~~		+--------+
	+------+</pre>
			LCC32
			+-----------------------------------------+
			\| 5 A10 \| \| 21 I/O3 \| \|
			\| 6 A11 \| 14 NC \| 22 NC \| 30 A5 \|
			\| 7 A12 \| 15 *OE \| 23 NC \| 31 A6 \|
			\| 8 A13 \| 16 GND \| 24 NC \| 32 Vcc \|
			\| 9 A14 \| 17 *WE \| 25 A0 \| 1 NC \|
			\| 10 A15 \| 18 I/00 \| 26 A1 \| 2 A7 \|
			\| 11 A16 \| 19 I/O1 \| 27 A2 \| 3 A8 \|
			\| 12 A17 \| 20 I/O2 \| 28 A3 \| 4 A9 \|
			\| 13 *CE \| \| 29 A4 \| \|
			+-----------------------------------------+
			</pre>

			=External links=
			[https://en.wikipedia.org/wiki/Static_random-access_memory SRAM page on wikipedia]

	~~[[Image~~:~~dip32-600mil~~.~~jpg]]~~		=Files=
			<gallery widths="150px">
			File:P4C1026.pdf\|p4c1026 Datasheet
			</gallery>

	[[Category:RAM]]		[[Category:RAM]]
	[[Category:~~DIP32~~]]		[[Category:SOJ28]]
			[[Category:LCC32]]

WikiSysop: WikiSysop moved page 256k x 4 to SRAM 256k x 4 without leaving a redirect

2017-02-01T20:35:16Z

WikiSysop moved page 256k x 4 to SRAM 256k x 4 without leaving a redirect

← Older revision	Revision as of 20:35, 1 February 2017
(No difference)

WikiSysop at 12:53, 7 October 2009

2009-10-07T12:53:55Z

← Older revision		Revision as of 12:53, 7 October 2009
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	[[Category:RAM]]		[[Category:RAM]]
			[[Category:DIP32]]

WikiSysop: 1 revision

2009-07-27T20:20:37Z

1 revision

← Older revision	Revision as of 20:20, 27 July 2009
(No difference)