6844: Difference between revisions
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''' | '''Direct Memory Access Controller (DMAC)''' | ||
=Pinout= | =Pinout= | ||
<pre> | <pre> | ||
DIP40 | DIP40 | ||
+---\/---+ | |||
Vss | 1 40| E | |||
*CS/Tx AKB | 2 39| *RESET | |||
R/*W | 3 38| DGRNT | |||
A0 | 4 37| *DRQ1 | |||
A1 | 5 36| *DRQ2 | |||
A2 | 6 35| Tx AKA | |||
A3 | 7 34| *Tx STB | |||
A4 | 8 33| *IRQ/*DEND | |||
A5 | 9 32| Tx RQ0 | |||
A6 |10 31| Tx RQ1 | |||
A7 |11 30| Tx RQ2 | |||
A8 |12 29| Tx RQ3 | |||
A9 |13 28| D0 | |||
A10 |14 27| D1 | |||
A11 |15 26| D2 | |||
A12 |16 25| D3 | |||
A13 |17 24| D4 | |||
A14 |18 23| D5 | |||
A15 |19 22| D6 | |||
Vcc |20 21| D7 | |||
+--------+ | |||
</pre> | </pre> | ||
| Line 39: | Line 39: | ||
</gallery> | </gallery> | ||
[[Category: | [[Category:Other Chips]] | ||
[[Category:DIP40-600mil]] | |||
Latest revision as of 15:30, 9 November 2017
Direct Memory Access Controller (DMAC)
Pinout
DIP40
+---\/---+
Vss | 1 40| E
*CS/Tx AKB | 2 39| *RESET
R/*W | 3 38| DGRNT
A0 | 4 37| *DRQ1
A1 | 5 36| *DRQ2
A2 | 6 35| Tx AKA
A3 | 7 34| *Tx STB
A4 | 8 33| *IRQ/*DEND
A5 | 9 32| Tx RQ0
A6 |10 31| Tx RQ1
A7 |11 30| Tx RQ2
A8 |12 29| Tx RQ3
A9 |13 28| D0
A10 |14 27| D1
A11 |15 26| D2
A12 |16 25| D3
A13 |17 24| D4
A14 |18 23| D5
A15 |19 22| D6
Vcc |20 21| D7
+--------+
Frequency
No frequency to check
External links
"6809 support chips" page on CPU-World
Files
-
MC6844 Datasheet
