DRAM 512k x 8: Difference between revisions
From Citylan
Jump to navigationJump to search
Created page with "{| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable" |+ style="background:silver" | Cross-Reference !BRAND !TAG !NUMBER !PIN COUNT !OUTPUT !MAR..." |
mNo edit summary |
||
| Line 49: | Line 49: | ||
+------+ | +------+ | ||
ZIP28 | |||
^ | ^ | ||
*OE 1 | | *OE 1 | | ||
| Line 92: | Line 92: | ||
[[Category:RAM]] | [[Category:RAM]] | ||
[[Category:SOJ28-400mil]] | [[Category:SOJ28-400mil]] | ||
[[Category:ZIP28 | [[Category:ZIP28]] | ||
Latest revision as of 12:21, 20 August 2022
| BRAND | TAG | NUMBER | PIN COUNT | OUTPUT | MARKINGS |
|---|---|---|---|---|---|
| Samsung | KM | 48C512 | KM48C512 KM48C512L KM48C512LS | ||
| Samsung | KM | 48V512 | KM48V512 KM48V512L KM48V512LS | ||
| Samsung | KM | 48C514 | KM48C514 KM48C514L KM48C514LS | ||
| Samsung | KM | 48V514 | KM48V514 KM48V514L KM48V514LS |
Dynamic Random-Access Memory 512K x 8
Size
| bit | Byte | Hex |
|---|---|---|
| 4Mb | 512KB | 400000hex |
Pinout
SOJ28-400mil
+--\/--+
Vcc |1 28| Vss
DQ1 |2 27| DQ8
DQ2 |3 26| DQ7
DQ3 |4 25| DQ6
DQ4 |5 24| DQ5
NC |6 23| *CAS
*W |7 22| *OE
*RAS |8 21| NC
A9 |9 20| A8
A0 |10 19| A7
A1 |11 18| A6
A2 |12 17| A5
A3 |13 16| A4
Vcc |14 15| Vss
+------+
ZIP28
^
*OE 1 |
| 2 *CAS
DQ5 3 |
| 4 DQ6
DQ7 5 |
| 6 DQ8
Vss 7 |
| 8 Vcc
DQ1 9 |
| 10 DQ2
DQ3 11 |
| 12 DQ4
NC 13 |
| 14 *W
*RAS 15 |
| 16 A9
A0 17 |
| 18 A1
A2 19 |
| 20 A3
Vcc 21 |
| 22 Vss
A4 23 |
| 24 A5
A6 25 |
| 26 A7
A8 27 |
| 28 NC
-
External links
Files
-
KM48C512 Datasheet